This invention relates to a current sensing circuit and more particularly to means for accurately sensing the current flowing through a power transistor.
It is often desirable and/or necessary to sense the load current flowing through a load in order to control and/or limit the load current, or to ascertain when certain current levels are reached.
It is known to sense the amplitude of a load current by placing a resistor of known value in series with the load and sensing the voltage developed across the resistor. However, where the load current is very high, this method is undesirable as it wastes power and may unduly limit the current.
The present inventor previously suggested, in U.S. Pat. No. 4,553,084, the use of a current "mirroring" transistor connected in parallel with a power transistor to sense the load current in the power transistor. The mirroring transistor is sized to be a small known ratio (i.e., 1/N) of the power transistor in order to carry 1/Nth of the current in the power transistor. A small resistor is connected to the source electrode of the "mirroring" transistor to sense the current and to generate a voltage proportional to the load current. However, as detailed below, the use of the current sensing resistor introduces a voltage offset whereby the current in the mirroring transistor is no longer proportional to the load current.
The prior art sensing circuit shown in U.S. Pat. No. 4,553,084 and problems associated therewith are best explained with reference to FIG. 1. A load, Z.sub.L, is connected between an output terminal 15 and a power terminal 17, to which is applied a potential of V.sub.DD volts. The source-to-drain conduction path of an MOS power transistor, T1, of N-conductivity type, designed to switch the current through the load, is connected between terminal 15 and a ground terminal 13. The drain-to-source conduction path of a current "mirroring" transistor, T2, is connected between terminal 15 and a sensing node 19 and a current sensing resistor Rp is connected between terminal 19 and ground, 13. The gate electrodes of transistors T1 and T2 are connected in common to a terminal 21 to which is applied an input voltage V.sub.IN. Transistors T1 and T2 are sized so that transistor T1 is "N" times the size of transistor T2. By way of example, the geometry of T1 may be 100 times that of T2 whereby for a like bias condition the current through T1 is 100 times that through T2. Consequently, for like bias conditions the effective impedance of T2 is "N" times that of T1.
If resistor Rp were of negligible impedance, the source of T2 would be effectively returned to ground, and the current through T2 would be 1/N times the current through T1 and track linearly. However, the presence of resistor Rp in the source path of transistor T2 causes a voltage to be generated at the source of T2 which varies as a function of the current through Rp. As the current through Rp increases the voltage at the source of transistor T2 increases, thereby decreasing the gate-to-source potential (V.sub.GS) and the drain-to-source potential (V.sub.DS) of T2. Since the V.sub.GS and V.sub.DS of T2 are no longer equal to the V.sub.GS and V.sub.DS of T1, the current through T2 is no longer proportional to the current through T1.
Resistor Rp may be made very small in which case the error or offset is negligible. However, there are many applications where it is impossible to make resistor Rp very small and/or if resistor Rp is made very small sensing the voltage Vp becomes difficult and subject to errors.